Language/OS - Multiplatform Resource Library

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Assembly Source File | 1986-08-19 | 16.5 KB | 1,075 lines

***************************************************************** * * THIS IS A FLOATING POINT ADDITION ROUTINE WHICH * IMPLEMENTS THE IEEE PROPOSED FLOATING POINT FORMAT * ON THE TMS32010. * ****************************************************************** * * INITIAL FORMAT (ALL 16 BIT WORDS) * ------------------ * | ALL 0 OR ALL 1 | ASIGN (0 OR -1) * ------------------ * * ------------------ * |0|. 15 BITS | AHI (NORMALIZED) * ------------------ * * ------------------ * |0| 9 BITS |--0-| ALO * ------------------ * * ------------------ * | | AEXP (-127 TO 128) * ------------------ * * TO HAVE THIS CORRESPOND TO IEEE FORMAT, INPUT * 0.1F * 2 ** (E + 1) * INSTEAD OF 1.F * 2 ** E AND SUBTRACT 127 FROM E. * * THE FINAL FORMAT IS THE SAME AS THE INITIAL FORMAT * EXCEPT THAT FOR CLO WE HAVE: * * ----------------- * | 16 BITS | CLO * ----------------- * * ALL 16 BITS OF CLO ARE VALID. ANYTHING PAST THESE * HAS BEEN TRUNCATED. * ****************************************************************** * * WORST CASE (EXCLUDING INITIALIZATION AND I/O): * 17.2 MICROSECONDS. * THIS FIGURE INCLUDES THE NORMALIZATION. * WORDS OF PROGRAM MEMORY: 768 * ******************************************************************* * IDT 'IEEEADD' DORG 0 * AEXP BSS 1 AHI BSS 1 ALO BSS 1 ASIGN BSS 1 BEXP BSS 1 BHI BSS 1 BLO BSS 1 BSIGN BSS 1 CEXP BSS 1 CHI BSS 1 CLO BSS 1 CSIGN BSS 1 C11 BSS 1 C12 BSS 1 C21 BSS 1 C22 BSS 1 C31 BSS 1 C32 BSS 1 C33 BSS 1 C34 BSS 1 C23 BSS 1 C24 BSS 1 C35 BSS 1 C36 BSS 1 C37 BSS 1 C38 BSS 1 CTEMP BSS 1 D BSS 1 SHIFT1 BSS 1 SHIFT2 BSS 1 AHITL BSS 1 BHITL BSS 1 N1 BSS 1 N2 BSS 1 N3 BSS 1 N4 BSS 1 N5 BSS 1 N6 BSS 1 N7 BSS 1 N8 BSS 1 N9 BSS 1 N10 BSS 1 N11 BSS 1 N12 BSS 1 N13 BSS 1 N14 BSS 1 N15 BSS 1 N16 BSS 1 N17 BSS 1 N18 BSS 1 N19 BSS 1 N20 BSS 1 N21 BSS 1 N22 BSS 1 N23 BSS 1 N24 BSS 1 N25 BSS 1 N26 BSS 1 N27 BSS 1 N28 BSS 1 N29 BSS 1 N30 BSS 1 ONE BSS 1 TWO BSS 1 FIFTEN BSS 1 SIXTEN BSS 1 M0002 BSS 1 M0003 BSS 1 M000F BSS 1 M001F BSS 1 M007F BSS 1 M00FF BSS 1 M01FF BSS 1 M03FF BSS 1 M07FF BSS 1 M0FFF BSS 1 M1FFF BSS 1 M3FFF BSS 1 M7FFF BSS 1 M8000 BSS 1 OS BSS 1 * * * BEGIN THE PROGRAM SEGMENT * * AORG >0 * B START * SHIFTS DATA 2 DATA 4 DATA 8 DATA 16 DATA 32 DATA 64 DATA 128 DATA 256 DATA 512 DATA 1024 DATA 2048 DATA 4096 DATA 8192 DATA 16384 DATA 32768 * * * A LITTLE INITIALIZATION * START LDPK 0 LACK 1 SACL ONE LARK AR0,N1 LARK AR1,29 ZAC LOOP SUB ONE LARP AR0 SACL *+,0,AR1 BANZ LOOP LACK 2 SACL M0002 SACL TWO LACK 3 SACL M0003 LACK 15 SACL M000F SACL FIFTEN LACK 16 SACL SIXTEN LACK 31 SACL M001F LACK 127 SACL M007F LAC M000F,4 ADD M000F SACL M00FF ADD ONE,8 SACL M01FF ADD ONE,9 SACL M03FF ADD ONE,10 SACL M07FF ADD ONE,11 SACL M0FFF ADD ONE,12 SACL M1FFF ADD ONE,13 SACL M3FFF ADD ONE,14 SACL M7FFF LAC ONE,15 SACL M8000 LT ONE MPYK SHIFTS PAC SACL OS * * * FINISHED INITIALIZATION * * IN ASIGN,PA0 IN AEXP,PA0 IN AHI,PA0 IN ALO,PA0 IN BSIGN,PA0 IN BEXP,PA0 IN BHI,PA0 IN BLO,PA0 * LAC AEXP SUB BEXP BLZ ALTB * BRANCH IF AEXP < BEXP * * BZ AEQB * BRANCH IF AEXP = BEXP * * SACL D * D IS THE RIGHT SHIFT NEEDED FOR B * * LAC AEXP SACL CEXP * THE EXP FOR THE RESULT IS AEXP * * AGTB LAC FIFTEN * A > B SO SHIFT B TO THE RIGHT D * SUB D BLEZ BHIZER * IF D >= 15 BHI IS ZERO * * ADD OS ----------------- TBLR SHIFT1 |0| 15 BITS | BHI * ----------------- * ---------------- * |0| 8 BITS | | BLO * ----------------- LT BHI || IS MPY SHIFT1 || CHANGED PAC VV TO ABS VV SACH BHI VV SACL BHITL ----------------- * | -0- | 15-D | BHI LT BLO ----------------- MPY SHIFT1 ----------------- PAC | D | 16-D | BLO APAC ----------------- ABS ADDH BHITL SACH BLO LAC ALO,1 SACL ALO * B DUN * FINISHED SHIFT OF B BY D TO THE RIGHT * * BHIZER ADD ONE * IF D >= 16 BLO LOSES BITS * BLEZ BLOLUZ * * WE ONLY GET HERE IF D = 15 * * ------------------ * |0| 15 BITS | BHI LAC BLO,2 ------------------ SACH BLO ------------------ ZALS BLO |0| 8 BITS | | BLO ADD BHI,1 ------------------ SACL BLO || ZAC VV SACL BHI ------------------ * | -0- | BHI * ------------------ * ------------------ * | 15 BITS |?| BLO * ------------------ LAC ALO,1 SACL ALO * B DUN * FINISHED SHIFT OF B BY D TO THE RIGHT * * BLOLUZ BZ SHB16 ADD FIFTEN BLEZ BZERO IF D >= 31, THEN B IS ZERO. * ------------------ ADD OS |0| 15 BITS | BHI TBLR SHIFT1 ------------------ * ------------------ LT BHI |0| 8 BITS | | BLO MPY SHIFT1 ------------------ PAC || ABS VV SACH BLO VV ZAC ------------------ SACL BHI |0| ---0--- | BHI * ------------------ * ------------------ * | --0-- | 31 - D| BLO * ------------------ LAC ALO,1 SACL ALO * B DUN * SHB16 LAC BHI SACL BLO ZAC SACL BHI * LAC ALO,1 SACL ALO * B DUN * ALTB ABS * TO SEE WHAT IS GOING ON LOOK AT * THE PREVIOUS CASE FOR AGTB * SACL D * LAC BEXP SACL CEXP * LAC FIFTEN SUB D BLEZ AHIZER * ADD OS TBLR SHIFT1 * LT AHI MPY SHIFT1 PAC ABS SACH AHI SACL AHITL * LT ALO MPY SHIFT1 PAC APAC ABS ADDH AHITL SACH ALO LAC BLO,1 SACL BLO * B DUN * AHIZER ADD ONE BLEZ ALOLUZ * LAC ALO,2 SACH ALO LAC ALO ADD AHI,1 SACL ALO ZAC SACL AHI LAC BLO,1 SACL BLO * B DUN * ALOLUZ BZ SHA16 ADD FIFTEN BLEZ AZERO * ADD OS TBLR SHIFT1 * LT AHI MPY SHIFT1 PAC ABS SACH ALO ZAC SACL AHI LAC BLO,1 SACL BLO * B DUN * SHA16 LAC AHI SACL ALO ZAC SACL AHI * LAC BLO,1 SACL BLO * B DUN * AZERO LAC BHI SACL CHI LAC BEXP SACL CEXP LAC BLO,1 SACL CLO LAC BSIGN SACL CSIGN B OUTPUT * BZERO LAC AHI SACL CHI LAC AEXP SACL CEXP LAC ALO,1 SACL CLO LAC ASIGN SACL CSIGN B OUTPUT * AEQB LAC ALO,1 SACL ALO LAC BLO,1 SACL BLO LAC AEXP SACL CEXP * * * GO TO DUN * * DUN LAC ASIGN SUB BSIGN BNZ DIFSIN * BRANCH IF THERE IS A SIGN DIFFERENCE * * ZALH AHI ADDS ALO ADDS BLO ADDH BHI ----------------- * |0| 15 BITS | CHI SACH CHI ----------------- SACL CLO ----------------- BZ CZERO | 16 BITS | CLO * ----------------- * BGEZ NOOV * CHECKING FOR OVERFLOW DUE TO ADD * * LAC CHI,15 * SHIFT TO RIGHT ONE TO CANCEL OVERFLOW * SACH CHI SACL CTEMP * LAC CHI AND M7FFF * CANCEL SIGN EXTENSION * SACL CHI * LAC CLO,15 SACH CLO LAC CLO AND M7FFF * CANCEL SIGN EXTENSION * ADDS CTEMP SACL CLO * LAC CEXP ADD ONE * DUE TO RIGHT SHIFT * SACL CEXP * LAC ASIGN SACL CSIGN * B OUTPUT * FINISHED RIGHT SHIFT * * NOOV LAC ASIGN SACL CSIGN * B NORM * DIFSIN BLZ CHAS * IF < 0 DO (B - A) * * CHBS ZALH AHI * DO (|A| - |B|) SINCE B < 0 AND A > 0 * ADDS ALO SUBS BLO SUBH BHI * BZ CZERO BLZ CNEG * SACH CHI SACL CLO * ZAC SACL CSIGN * B NORM * CHAS ZALH BHI * DO (|B| - |A|) SINCE A < 0 AND B > 0 * ADDS BLO SUBS ALO SUBH AHI * BZ CZERO BLZ CNEG * SACH CHI SACL CLO * ZAC SACL CSIGN * B NORM * CZERO ZAC SACL CEXP SACL CHI SACL CLO SACL CSIGN B OUTPUT * CNEG ABS SACH CHI SACL CLO LAC N1 SACL CSIGN * * * GO TO NORM * * * ***************************************************************** * * NORM DOES THE NORMALIZATION. THAT IS TO SAY THAT IT * FINDS THE MSB OF CHI AND CLO. IN THIS CASE THE MSB WILL * BE THE FIRST ONE (1) FOUND. THE SEARCH FOR THIS SPECIAL * ONE IS DONE WITH A BINARY SEARCH. THE NOTATION USED * IS SUMMARIZED HERE: * * * |------------------- 16 BITS -------------------| * * ------------------------------------------------- * | CHI OR CLO | CHI OR CLO * ------------------------------------------------- * ------------------------------------------------- * | C11 I C12 | 8 BITS EACH * ------------------------------------------------- * ------------------------------------------------- * | C21 I C22 | C23 I C24 | 4 BITS EACH * ------------------------------------------------- * ------------------------------------------------- * | C31 I C32 | C33 I C34 | C35 I C36 | C37 I C38 | 2 BITS EACH * ------------------------------------------------- * ------------------------------------------------- * | | | | | | | | | | | | | | | | | 1 BIT EACH * ------------------------------------------------- * * THE I'S REPRESENT THE BOUNDARY BETWEEN THE ACC HIGH BITS * AND THE ACC LOW BITS WHEN THE HIGHER LEVEL IS LOADED INTO * THE ACC WITH THE NECESSARY SHIFT TO SPLIT BY A FACTOR OF * TWO. * WORST CASE: 6.4 MICROSECONDS. * ****************************************************************** NORM LAC CHI,8 BZ CLOB * BRANCH IF MSB IS IN CLO * * SACH C11 * SPLIT THE 16 BIT WORD INTO TWO SACL C12 8 BIT WORDS * * LAC C11,12 BZ C12B * IF THERE IS A ONE IN C11 IT WILL * BE NONZERO * SACH C21 SACL C22 * LAC C21,14 BZ C22B * IF THERE IS A ONE ETC. * * SACH C31 SACL C32 * LAC C31 BZ C32B * IF THERE IS A ONE ETC. * * B OUTPUT * THE MSB CANNOT BE IN BIT ONE BECAUSE THIS * WAS HANDLED EARLIER * C32B LAC C32 AND M8000 BZ MSB4 * MSB# MEANS THE MSB IS IN BIT # FROM LEFT * TO RIGHT * * LAC N1 * LEFT SHIFT OF 1 * ADD CEXP SACL CEXP * ZALH CHI ADDS CLO ADDH CHI ADDS CLO SACH CHI SACL CLO * B OUTPUT * MSB4 LAC N2 * LEFT SHIFT OF 2 * ADD CEXP SACL CEXP * LAC CLO,2 SACL CLO SACH CTEMP LAC CTEMP AND M0003 ADD CHI,2 SACL CHI * B OUTPUT * C22B LAC C22,2 SACH C33 SACL C34 * LAC C33 BZ C34B * BRANCH IF NO ONE * * AND M0002 BZ MSB6 * LAC N3 * LEFT SHIFT OF THREE * ADD CEXP SACL CEXP LAC CLO,3 SACL CLO SACH CTEMP LAC CTEMP AND M000F ADD CHI,3 SACL CHI * B OUTPUT * MSB6 LAC N4 * LEFT SHIFT OF 4 * ADD CEXP SACL CEXP * LAC CLO,4 SACL CLO SACH CTEMP LAC CTEMP AND M000F ADD CHI,4 SACL CHI * B OUTPUT * C34B LAC C34 * AND M8000 BZ MSB8 * LAC N5 * LEFT SHIFT OF 5 * ADD CEXP SACL CEXP * LAC CLO,5 SACL CLO SACH CTEMP LAC CTEMP AND M001F ADD CHI,5 SACL CHI * B OUTPUT * MSB8 LAC N6 * LEFT SHIFT OF 6 * ADD CEXP SACL CEXP * LAC CLO,6 SACL CLO SACH CTEMP LAC CTEMP AND M001F ADD CHI,6 SACL CHI * B OUTPUT * ^^ COMPLETES TOP 8 BITS ^^ * * C12B LAC C12,4 SACH C23 SACL C24 * LAC C23,14 BZ C24B * SACH C35 SACL C36 * LAC C35 BZ C36B * AND M0002 BZ MSB10 * LAC N7 * LEFT SHIFT OF 7 * ADD CEXP SACL CEXP * LAC CLO,7 SACL CLO SACH CTEMP LAC CTEMP AND M007F ADD CHI,7 SACL CHI * B OUTPUT * MSB10 LAC N8 * LEFT SHIFT OF 8 * ADD CEXP SACL CEXP * LAC CLO,8 SACL CLO SACH CTEMP LAC CTEMP AND M00FF ADD CHI,8 SACL CHI B OUTPUT * C36B LAC C36 AND M8000 BZ MSB12 LAC N9 * LEFT SHIFT OF 9 * ADD CEXP SACL CEXP LAC CLO,9 SACL CLO SACH CTEMP LAC CTEMP AND M01FF ADD CHI,9 SACL CHI * B OUTPUT * MSB12 LAC N10 * LEFT SHIFT OF 10 * ADD CEXP SACL CEXP * LAC CLO,10 SACL CLO SACH CTEMP LAC CTEMP AND M03FF ADD CHI,10 SACL CHI * B OUTPUT * C24B LAC C24,2 SACH C37 SACL C38 * LAC C37 BZ C38B * AND M0002 BZ MSB14 * LAC N11 * LEFT SHIFT OF 11 * ADD CEXP SACL CEXP * LAC CLO,11 SACL CLO SACH CTEMP LAC CTEMP AND M07FF ADD CHI,11 SACL CHI * B OUTPUT * MSB14 LAC N12 * LEFT SHIFT OF 12 * ADD CEXP SACL CEXP * LAC CLO,12 SACL CLO SACH CTEMP LAC CTEMP AND M0FFF ADD CHI,12 SACL CHI * B OUTPUT * C38B LAC C38 AND M8000 BZ MSB16 * LAC N13 * LEFT SHIFT OF 13 * ADD CEXP SACL CEXP * LAC CLO,13 SACL CLO SACH CTEMP LAC CTEMP AND M1FFF ADD CHI,13 SACL CHI * B OUTPUT * MSB16 LAC N14 * LEFT SHIFT OF 14 * ADD CEXP SACL CEXP * LAC CLO,14 SACL CLO SACH CTEMP LAC CTEMP AND M3FFF ADD CHI,14 SACL CHI * B OUTPUT * CLOB LAC CLO,8 * CHI IS ZERO * * SACH C11 * SPLIT THE 16 BIT WORD INTO TWO SACL C12 8 BIT PIECES * * LAC C11,12 BZ C12BP * IF THERE IS A ONE ETC. * * SACH C21 SACL C22 * LAC C21,14 BZ C22BP * IF THERE IS A ONE ETC. * * SACH C31 SACL C32 * LAC C31 BZ C32BP * IF THERE IS A ONE ETC. * * AND M0002 BZ MSB18 * LAC N15 * LEFT SHIFT OF 15 * ADD CEXP SACL CEXP * LAC CLO,15 SACH CHI SACL CLO LAC CHI AND M7FFF SACL CHI * B OUTPUT * MSB18 LAC N16 * LEFT SHIFT OF 16 * ADD CEXP SACL CEXP * LAC CLO SACL CHI ZAC SACL CLO * B OUTPUT * C32BP LAC C32 AND M8000 BZ MSB20 * LAC N17 * LEFT SHIFT OF 17 * ADD CEXP SACL CEXP * LAC CLO,1 SACL CHI ZAC SACL CLO * B OUTPUT * MSB20 LAC N18 * LEFT SHIFT OF 18 * ADD CEXP SACL CEXP * LAC CLO,2 SACL CHI ZAC SACL CLO * B OUTPUT * C22BP LAC C22,2 SACH C33 SACL C34 * LAC C33 BZ C34BP * BRANCH IF NO ONE * * AND M0002 BZ MSB22 * LAC N19 * LEFT SHIFT OF 19 * ADD CEXP SACL CEXP * LAC CLO,3 SACL CHI ZAC SACL CLO * B OUTPUT * MSB22 LAC N20 * LEFT SHIFT OF 20 * ADD CEXP SACL CEXP * LAC CLO,4 SACL CHI ZAC SACL CLO * B OUTPUT * C34BP LAC C34 AND M8000 BZ MSB24 * LAC N21 * LEFT SHIFT OF 21 * ADD CEXP SACL CEXP * LAC CLO,5 SACL CHI ZAC SACL CLO * B OUTPUT * MSB24 LAC N22 * LEFT SHIFT OF 22 * ADD CEXP SACL CEXP * LAC CLO,6 SACL CHI ZAC SACL CLO * B OUTPUT * ^^ COMPLETES TOP 8 ^^ * * C12BP LAC C12,4 SACH C23 SACL C24 * LAC C23,14 BZ C24BP SACH C35 SACL C36 * LAC C35 BZ C36BP * AND M0002 BZ MSB26 * LAC N23 * LEFT SHIFT OF 23 * ADD CEXP SACL CEXP * LAC CLO,7 SACL CHI ZAC SACL CLO * B OUTPUT * MSB26 LAC N24 * LEFT SHIFT OF 24 * ADD CEXP SACL CEXP * LAC CLO,8 SACL CHI ZAC SACL CLO * B OUTPUT * C36BP LAC C36 AND M8000 BZ MSB28 * LAC N25 * LEFT SHIFT OF 25 * ADD CEXP SACL CEXP LAC CLO,9 SACL CHI ZAC SACL CLO * B OUTPUT * MSB28 LAC N26 * LEFT SHIFT OF 26 * ADD CEXP SACL CEXP * LAC CLO,10 SACL CHI ZAC SACL CLO * B OUTPUT * C24BP LAC C24,2 SACH C37 SACL C38 * LAC C37 BZ C38BP * AND M0002 BZ MSB30 * LAC N27 * LEFT SHIFT OF 27 * ADD CEXP SACL CEXP * LAC CLO,11 SACL CHI ZAC SACL CLO * B OUTPUT * MSB30 LAC N28 * LEFT SHIFT OF 28 * ADD CEXP SACL CEXP * LAC CLO,12 SACL CHI ZAC SACL CLO * B OUTPUT * C38BP LAC C38 AND M8000 BZ MSB32 * LAC N29 * LEFT SHIFT OF 29 * ADD CEXP SACL CEXP * LAC CLO,13 SACL CHI ZAC SACL CLO * B OUTPUT * MSB32 LAC N30 * LEFT SHIFT OF 30 * ADD CEXP * SORRY, BUT THATS ALL THE ACC CAN HOLD * SACL CEXP * LAC CLO,14 SACL CHI ZAC SACL CLO * * * OUTPUT OUT CSIGN,PA1 OUT CEXP,PA1 OUT CHI,PA1 OUT CLO,PA1 * SELF B SELF * END